SDR board with Xilinx ZynqUP+ FPGA SoC and ADRV9009 Transceivers

Combination of NAT-AMC-ZYNQUP-FMC carrier and 1x or 2x NAT-FMC-SDR mezzanines Up to 4x Analog Devices ADRV9009 dual RF transmitters, receivers, and observation receivers Xilinx ZynqUP+ FPGA SoC with quad-core ARM Cortex-53 and dual-core Cortex-R5 Various customizable memory options and numerous interfaces towards front panel and backplane Development platform in ready-to-deploy package with optional housing